A) Field of the Invention
The present invention relates to a semiconductor device manufacture method, and more particularly to a semiconductor device manufacture method suitable for forming wirings by a damascene method by which a concave portion formed in an interlayer insulating film is filled with a conductive member.
B) Description of the Related Art
Miniaturization of wirings and increasing of wiring layers are progressing as semiconductor elements are highly integrated and chip sizes are reduced. In a logical element having a multi-layer wiring structure, a delay of a signal transmitting along a wiring is becoming a dominant factor of lowering an operation speed of the logical element. The delay of a signal transmitting along a wiring is proportional to a product of a wiring resistance and a parasitic capacitance between wirings.
Technologies of using copper (Cu) having a low resistivity as wiring material are adopted practically in order to reduce wiring resistance. Since it is difficult to pattern a copper film by using photolithography process, a damascene method is generally adopted to form copper wirings.
When a copper wiring is formed by the damascene method, the inner surface of a wiring trench and a via hole is covered with a barrier layer before the copper film is deposited, the main object of the barrier layer being to prevent diffusion of copper into an insulating film. Refractory metal such as tantalum (Ta) and tungsten (W) is used as the material of a barrier film. Refractory metal has a resistivity higher than that of copper.
As the size of a wiring becomes fine, a ratio of the barrier layer occupying the cross section of the wiring becomes large. Therefore, the barrier layer has a large factor of raising a wiring resistance. Especially, in a fine multi-layer wiring structure having a diameter and wiring width of a via hole of 0.1 μm or smaller, it is desired to make the barrier layer as thin as possible.
The document “Low-temperature passivation of copper by doping with Al or Mg” by W. A. Lanford et al., Thin Solid Films, 262 (1995), pp. 234 to 241 discloses the technique of forming an Al oxide or Mg oxide layer on the surface of Cu by doping Al or Mg into Cu and performing heat treatment. This oxide layer functions as a protective film and diffusion preventing film for Cu.
Next, description will be made on a method of forming a thin barrier layer having a uniform thickness, disclosed in the document “Low Resistive and Highly Reliable Cu Dual-Damascene Interconnect Technology Using Self-Formed MnSixOy Barrier layer” by T. Usui et al., IITC 2005, Session 9.2. A seed layer of CuMn alloy is formed by sputtering on the surface of an interlayer insulating film formed with wiring trenches and via holes. Thereafter, copper is electroplated to fill the wiring groove and via hole with the copper. Heat treatment is performed to react Si and O as the constituent elements in the interlayer insulating film with Mn as the constituent element in the seed layer. A barrier layer is therefore formed at the interface between a Cu wiring and the interlayer insulating film, the barrier layer being made of MnSixOy compound which is very thin about 2 to 3 nm in thickness and has a uniform thickness. This barrier layer prevents diffusion of Cu.
The seed layer covering the bottom of the via hole does not contact the interlayer insulating film and contacts a lower level wiring. Therefore, the barrier layer is not formed at the interface between the copper wiring in the via hole and the lower level wiring, so that the upper and lower level wirings can be connected without the barrier layer between the upper and lower level wirings. Further, since the barrier layer made of MnSiO compound can be made thinner than a barrier layer made of refractory metal, it is possible to suppress an increase of wiring resistance.